Research Area

  1. 1. GPU Architecture

    Current Students:

    • Atiyeh Gheibi-Fetrat(MSc)
    • Ahmad Javadi-Nezhad(MSc)
    • Ali Mohammadpur Fard(MSc)
    • Masoud Mohammadi Lak(MSc)
    • Tayebeh Younesi(MSc)
    • Amir Mohammad Biuki(MSc)
    • Zahra Mirzaei(MSc)

    Alumni:

    • Mohammad Sadrossadati(PhD)
    • Negin Mahani(PhD)
    • Saba Mostofi(MSc)
    • Rahil Barati(MSc)
    • Marziyeh Barkhordar(MSc)
    • Maedeh Rostamnezhad(MSc)
    • Saeideh Baneshi(MSc)
  2. 2. Machine Learning

    Current Students:

    • Seyed Saman Mohseni Sangtabi(MSc)

    Alumni:

    • Ehsan Aghapoor(MSc)
    • Faraz Tahmasebi(MSc)
    • Fardin Dadashi(MSc)
  3. 3. Memory System

    Alumni:

    • Sina Darabi(PhD)
    • Seyed Mahdi Ebrahimi(MSc)
    • Fateme Golshan(MSc)
    • Ali Ansari(MSc)
  4. 4. Non-Volatile Memory

    Current Students:

    • Negar Akbarzadeh(PhD)
    • Armin Ahmadzadeh(PhD)
  5. 5. Storage Systems

    Current Students:

    • Maedeh Safari(PhD)

    Alumni:

    • Arghavan Mohammadhassani(MSc)
    • Elmira Pishyar(MSc)
  6. 6. NoC

    Current Students:

    • Atiyeh Gheibi-Fetrat(MSc)

Open-Source Projects, Tools and Software

  1. 1. Source code for ICD paper, ACM TODAES 2019

    ICD is a novel cache management policy that seeks to reduce costly writebacks in the context of non-volatile memory technologies.

  2. 2. Source code for Bingo paper, HPCA 2019

    Bingo is a novel data prefetching approach that exploits the spatial correlation of access patterns to predict and prefetch future cache misses of applications.

  3. 3. Source code for LTRF paper, ASPLOS 2018

    LTRF is a novel architecture for the register file of GPUs that seeks to use a two-level structure, providing both low-latency and low-power consumption.

  4. 4. XMulator: A listener-Based Integrated Simulation Platform for Interconnection Networks, AMS 2007

    Xmulator is a listener-based simulation framework for interconnection networks, sensor networks, queuing networks in C#.

  5. 5. An open-source Verilog implementation for Netowork-on-Chip (NoC)

    This project provides an open-source Verilog implementation for Network-on-Chip (NoC), enabling experimental studies.